Lichee Pi Zero based on Allwinner V3S (ARM Cortex-A7 CPU, max 1.2GHz, 512Mbit DDR2 integrated) 2. [File Introductions] pack_zero_img.sh --> Pack script;.
March 30, 2018 by Jean-Luc Aufranc (CNXSoft) - 18 Comments Allwinner S3 Dual Camera SoC Includes 128MB RAM, an I2S Audio Interface Allwinner V3s processor was introduced a little over a year ago with a single Arm Cortex A7 core, 64MB DRAM built-in, and designed for camera applications with parallel CSI and 4-lane MIPI CSI2 interfaces.
CPU ：Allwinner V3S， ARM Cortex-A7, 1.2GHz max Memory ：64MB DDR2 integrated Storage ： SOP8 SPI Flash for boot (Reserved)（8~32MB SPI Nor Flash,128MB Nand Flash customizable) TF Card Slot for boot. Display Information General 40P RGB LCD FPC: Direct plug 40P 4.3/5/7 inch LCD（onboard backlight driver) plug 50P 7/9inch LCD via converter board.
This is the ASoC part of the Allwinner V3s audio codec support. The audio codec is like the ones on A23/H3, but much simpler. As it lacks two features that used to be common (MIC2 and LINEIN), some structures are altered to exclude these features. Icenowy Zheng (3): ASoC: sun8i-codec-analog: prepare a mixer control/widget/route set for V3s.